1. Field of the Invention
The present invention relates to a method for detection and compensation of a rapid temperature change at a pressure metering cell. More particularly, the present invention relates to at least one of a sensor, an operating device, a communication device, or liquid level metering device with a computer, and adaptively or in combination with a method for actuating a computer of such a sensor, operating device, communication device, liquid level metering device.
2. Description of the Related Art
Liquid level metering devices detect measured values related to a level of filling in a receptacle. Besides a sensor for detecting the measured values, such liquid level metering devices also often have computers. These serve to multiply a measured value detected by a sensor by an adjustment factor in order to balance out sensor influence or device influence when detecting the measured value. Often the actual measured value is created as a whole number by an analog-digital converter, while the adjustment factor is a real number in the form of a floating-point number. Accordingly, the computer must multiply a whole number by a floating-point number to obtain a product.
On a computer, especially a microcomputer with a very small memory of such a conventional liquid level metering device, one often has to multiply a whole number, which can be represented e.g. as data type short int, int, or (long) int in C or as data type INTEGER or LONGINT in Pascal, by a floating-point number, such as 1.2288, which can be represented e.g. as data type float in C or as data type REAL in Pascal, and once again the outcome should be a whole number. This operation is required, e.g., when a measured raw value has to be multiplied by a factor to obtain a precise measured value. In this case, one will use arithmetic operations for floating-point numbers instead of multiplications and divisions for whole numbers; since the microcomputer does not have these arithmetic operations built into its command set, it therefore needs to call them up as library functions. These library functions require a lot of commands from the command set of the microcomputer and therefore first of all, they consume a lot of memory, which is often not available on the microcomputer, and secondly a lot of computing time, which means an increased power demand, since the microcomputer cannot use any power saving mode during this time. Furthermore, it might mean that the particular technical problem can only be solved if the computing time is very small and the maximum speed of the microcomputer, especially its clock frequency, cannot be increased for technical reasons. Permissible limit values of the components of the microcomputer and power demand depending on clock frequency therefore limit the use of microcomputers in sensors and liquid level meters.
At present, a whole number is multiplied by a floating-point number in 2 ways. According to the first way, the whole number is multiplied by a second whole number and then the product is divided by a third whole number, while the quotient of the second and the third whole number must correspond as accurately as possible to the real number. According to the second way, the whole number is transformed into a floating-point number, e.g., 89 is changed to 89.0, and an arithmetic operation is used for the multiplication of the two floating-point numbers. After this, the result is changed back into a whole number.
A special encoding procedure is currently used for floating-point numbers in microcomputers in order to do arithmetic with floating-point numbers. The basis of the procedure is the fact that a floating-point number x can also be approximated by a mathematical series. This method is used, e.g., for the representation of floating-point numbers in the IEEE-754 floating-point format. Since microcomputers can work very well with numbers in the dual number system, the series of negative powers of two is used. Any given (real) number x can then be represented approximately as
            x      ≈                                                  (                              -                1                            )                        s                    ·                      2            e                          ⁢                  (                                    m              0                        +                                          m                1                            ⁢                              2                                  -                  1                                                      +                                          m                2                            ⁢                              2                                  -                  2                                                      +                                          m                3                            ⁢                              2                                  -                  3                                                      +            …            +                                          m                p                            ⁢                              2                                  -                  p                                                              )                      =                  s        ·                  2          e                    ⁢                                    ∑            0                    p                ⁢                              m            n                    ⁢                      2                          -              n                                            ,
where the coefficients of the mantissa m0 . . . mp can be 0 or 1 and the sign s=0 for a positive and s=1 for a negative number. The exponent in this binary exponential notation is e, which does not signify Euler' s number.
Referring now to FIG. 6, this figure shows the core image format of a floating-point number in the IEEE-754 32 bit floating-point format, as it is customarily encoded for storage between several processing steps within microcomputers and transfer between microcomputers and data media or between several microcomputers.
In the microcomputer, a number in the IEEE-754 floating-point format with 32 bits is stored with one bit for the sign S, 8 bits of the exponent E and 23 bits of the mantissa M. The most significant bit (MSB) of the mantissa M and the exponent E are at the far left, the least significant bit (LSB) at the far right. There are other versions of IEEE-754 formats for greater or lesser accuracy. Furthermore, there are forms of representation of binary encoded numbers in which the MSB is at far right. If a microcomputer uses such a form of representation also internally for its register and arithmetic logic unit (ALU), the directions for shift operations in multiplying or dividing by 2 will also be reversed accordingly. In any case, the form of representation with MSB at far left is usually adopted, even when the microcomputer processes numbers made up of several bytes in the little endian format, which means that the significance of the individual bytes (groups of 8 bits) increases according to the storage address. In terms of position of the storage addresses in microcomputers with little endian format, the least significant byte therefore stands at far left if one takes storage addresses as increasing from left to right. On the contrary, in microcomputers with big endian format, the least significant byte stands at far right and the significance decreases in accordance with the storage address. However, this difference only has consequences when the microcomputer requires several operations and storage accesses to process data words of greater width than the word width of its register and the data storage.
The mantissa of every number different from 0 in this representation can be altered by multiplying with 2, which corresponds to a left shifting of the mantissa by one bit, and simultaneously reducing the exponent by 1 per each shift for as long as the coefficient is m0=0 and until it first becomes 1, without anything changing in the value of the number. If the number of shifts in this process is n, the exponent will be reduced by n and the factor 2e in front of the mantissa will be divided by 2n and at the same time the mantissa will be multiplied by 2n. This option is always used in the IEEE-754 floating-point format. A floating-point number in such a form is then said to be “normalized”.
Since, for a “normalized floating-point number”, the first coefficient or the highest bit, also known as the MSB, of the mantissa is always 1, one does not need to save this 1 in memory and thereby gains 1 additional bit for the resolution or precision p.
The highest bit of the mantissa, not memorized in the IEEE-754 floating-point format, is therefore also known as a hidden bit.
However, there are also other formats for floating-point numbers in which the highest bit of the mantissa is also saved in memory. Especially in computations with floating-point numbers, the highest bit having the value 1 must be put back in order to get a correct calculation result.
Another peculiarity results in that the exponent e is saved with a shifting (or bias B), so that e=E−B or E=e+B, with E being the memorized exponent. The bias used here is 2r-1−1, if r is the resolution or the bit number of the exponent. Thus, B=127 when r=8.
The mantissa m of a “normalized” floating-point number always lies precisely in the interval 1.0<=m<2.0. This applies for the notation as a binary number, number base 2. Formulated generally, the mantissa m of a “normalized” floating-point number always lies precisely in the interval 1.0<=m<N, if N is the number base used for the notation. Therefore, for the representation of the number 0 in the IEEE-754 floating-point format, a special notation is required. Accordingly, a number is precisely 0 when mantissa m and exponent e are 0 at the same time.
Hence, the exponent E of the number 1.0 is saved as 127 per 2127-127×1.00 . . . =20×1.00 . . . and the exponent of the number 0.0 as 0 per 20-127×1.00 . . . =2−127×1.00 . . . . The 1.00 . . . in the mantissa come from the always implicitly assumed 1 in the unsaved bit m0 of the mantissa for a normalized number. In any case, 2−127 is practically equal to 0 in calculations and moreover a special treatment can be done for the case when E=0 and M=1.0, i.e., all saved bits of M are 0.
The drawback in such solutions of the prior art in the case of whole numbers is that the arithmetic operation for whole number division is required. This operation requires a lot of program and data memory and computing time, if the microcomputer does not have this arithmetic operation built into its command set. The product of the whole number and the second whole number may then leave the range of whole numbers, such as 16 bit, and require whole number operations with an increased range of numbers, such as 32 bits.
The drawback with floating-point numbers is that the arithmetic operation for the multiplication of two floating-point numbers is required. Furthermore, conversion programs of whole number to floating-point number and floating-point number to whole number have to be carried out. All three operations require a lot of program and data memory and computing time, if the microcomputer does not have this arithmetic operation built into its command set. Moreover, the power consumption of the computation is high.